SystemC

Why systemC?

SystemC is replacing the specially designed HDL's like Verilog and VHDL in many situations. This does not mean that these HDL's are obsolete now, instead, systemC supports a new approach to design a system.

The systemC born because of the necessities of the current electronic industry: Electronic gadgets are incorporating greater and greater functionality today, but not compromising with the time to produce and market the gadgets. For example, you want your mobile handset to have internet facility but you are not ready to wait for one year for that facility to come. It is easy for you to demand, but it is not so easy for electronic design engineers who design the system. The greater complexity of the future systems are making the situation still worst. Previously, the C (or C++) was used to write the software part of the design. For hardware part any of the existing HDL's were used to design the hardware. It was very difficult to setup a testbench which is common for both, since they are entirely different languages. The introduction of systemC solved many of these problems.

The systemC is nothing but a C++ class library specially designed for system design. This is an open source ware, maintained by OSCI (Open source SystemC Initiative). (visit http://systemc.org for more details.)

The advantages of using systemC are:

1. It inherits all the features of C++, which is a stable programming language accepted all over the world. It has got large language constructs, which makes easier to write the program with less efforts.

2. Rich in data types: along with the types supported by C++, systemC supports the use of special data types which are often used by the hardware engineers.

3. It comes with a strong simulation kernel to enable the designers to write good test benches easily, and to simulate it. This is so important because the functional verification at the system level saves a lot of money and time.

4. It introduces the notion of time to C++, to simulate synchronous hardware designs. This is common in most of the HDL's.

5. While most of the HDL's support the RTL level of design, systemC supports the design at an higher abstraction level. This enables large systems to be modeled easily without worrying the implementation of it. It also supports RTL design, and this subset is usually called as systemC RTL.

6. Concurrency: To simulate the concurrent behavior of the digital hardware, the simulation kernel is is so designed that all the 'processes' are executed concurrently, irrespective of the order in which they are called.